Sunday, April 7, 2013
In which our protagonist finally gets to the point and presents the main components of the computer.
With our design goals firmly in mind, this is what we are going to build: A single-board computer (SBC) that communicates with the outside world via a serial line to a host computer and proves a basis for experiments. Nothing more, nothing less. The main components:
CPU: WDC 65c02. This is not a given. Obviously, we want the 65c02 instead of the 6502, because the original chip was buggy. The C-version also comes with extra features such as the BRA ("branch always") instruction, the "(abs,X)" addressing mode for jump tables, and lots of other goodies. These are too shiny to miss, as Kaylee would say.
However, the 65c02 has a big brother: The 65c816, a hybrid 8/16-bit processor. There are a number of BYO machines that use this chip, and its fans will tell you how useful the 16-bit instructions are. Unfortunately, this CPU is harder to work with. For example, it can address 16 Mb through eight additional address lines, but those double as the data lines. Too complicated for this project, so we stick with the 65c02.
From left to right and top to bottom: MAX238, 2692A DUART, clock cans, two 28C64 EEPROMs, 62C256 RAM, 65c02 CPU, VIA 65c22 (the S version, though we ordered a N). We've established by now that I suck at this sort of photography.
I/O: 2692A DUART, also known as the SCC2692, for communication with the host computer. The original plan was to use a 65c51 ASCI, which provides a single serial port, is simpler and better documented. Unfortunately, the ASCI is hard to get without going to unjustifiable expense (at least in Germany). So at the suggestion of the 6502.org forum, we'll use one 2692A dual asynchronous receiver/transmitter.
More complex than the 65c51, it comes with two serial channels, an eight bit output port, a seven [sic] bit input port, and a timer. This chip will generate at least one interrupt and requires some infrastructure such as a MAX238.
I/O: VIA 65c22. The Versatile Interface Adapter is the standard input/output companion chip for the 65c02. We wouldn't need it for a minimal Übersquirrel, but any future "big" machine will include at least one of these, so we might as well get to know and love it. This chip also generates an interrupt.
RAM: 62256-80 32 Kb. Half of our 64 Kb address space will be RAM, packed into this one chip. We'll never need this much, but it's inexpensive enough not to make a difference. You can never have too much RAM, money, or chocolate.
ROM: 28C64 EEPROM 8 Kb. The kernel and monitor will live in two 8 Kb read-only memory chips -- two for more flexibility. Finding an inexpensive way to program an EEPROM in the year 2013 is a headache, because the programmers on the market are ridiculously expensive. We'll deal with that in a later entry.
Clock: 1 MHz. The WDC 65c02 is rated up to 14 MHz, but to get that fast, you have to build high-speed circuits correctly, and that requires experience we don't have. We'll make sure to use a socket so we can swap different clocks in and out, and anything above 1 MHz will be nice to have. The 2692A needs its own clock.
In the next entry, we'll discuss the memory map. That will show how everything fits together.